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Preliminary Technical Data
FEATURES
Available in space-saving LFCSP package Gain set with 1 external resistor (gain range 1 to 1000) Wide power supply range: 2.3 V to 18 V Temperature range for specified performance: -40C to +85C
Precision, Dual-Channel Instrumentation Amplifier AD8222
FUNCTIONAL BLOCK DIAGRAM
OUT1 OUT2
14
VCC
16
15
-IN1 RG1 RG1 +IN1
AD8222
1 2 3 4 12 11 10 9
VEE
13
-IN2 RG2 RG2 +IN2
EXCELLENT AC SPECIFICATIONS
80 dB minimum CMRR to 10 kHz ( G = 1) 825 kHz, -3 dB bandwidth (G = 1) 2 V/s slew rate
5
6
7
8
05947-001
REF1
REF2
LOW NOISE
8 nV/Hz, @ 1 kHz, maximum input voltage noise 0.25 V p-p input noise (0.1 Hz to 10 Hz)
Figure 1. AD8222 Dual Instrumentation Amplifier
HIGH ACCURACY DC PERFORMANCE
80 dB minimum CMRR (G = 1) 120 dB minimum CMRR (G = 100) 70 V maximum input offset voltage 0.9 V/C maximum input offset drift 2 nA maximum input bias current
GENERAL DESCRIPTION
The AD8222 is a dual-channel, gain programmable, high performance instrumentation amplifier that delivers the industry's highest CMRR over frequency. The CMRR of most instrumentation amplifiers falls off at 200 Hz. In contrast, the AD8222 maintains a minimum CMRR of 80 dB to 10 kHz for all grades at G = 1. High CMRR over frequency allows the AD8222 to reject wideband interference and line harmonics, greatly simplifying filter requirements. Possible applications include precision data acquisition, biomedical analysis, and industrial process controls. The AD8222 is available in a 16-lead 4 mm x 4 mm LFCSP_VQ package, 75% less board space than a 16-lead SOIC. This small size makes AD8222 ideal for multichannel or space-constrained applications. The AD8222 is specified for single-ended and differential output operation over the entire industrial temperature range of -40C to +85C. It operates on both single and dual supplies.
APPLICATIONS
Industrial process controls Precision data acquisition systems Medical instrumentation Driving differential input ADCs Bridge amplifiers Weigh scales Strain gages Transducer interfaces
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2006 Analog Devices, Inc. All rights reserved.
VCC
VEE
AD8222 TABLE OF CONTENTS
Features .............................................................................................. 1 Excellent AC Specifications............................................................. 1 Low Noise .......................................................................................... 1 High Accuracy DC Performance.................................................... 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Description .............................. 6 Theory of Operation ........................................................................ 7
Preliminary Technical Data
Gain Selection................................................................................8 Layout .............................................................................................8 Reference Terminal .......................................................................8 Power Supply Regulation and Bypassing ...................................9 Input Bias Current Return Path ..................................................9 Input Protection ............................................................................9 RF Interference ........................................................................... 10 Precision Strain Gage................................................................. 10 Differential Out .......................................................................... 10 Outline Dimensions ....................................................................... 11 Ordering Guide .......................................................................... 11
REVISION HISTORY
3/06--Revision PrA: Preliminary Version
Rev. PrA | Page 2 of 12
Preliminary Technical Data SPECIFICATIONS
VS = 15 V, VREF = 0 V, TA = 25C, G = 1, RL = 2 k, unless otherwise noted. Table 1.
Single-Ended Output (Both Amplifiers) Min Typ Max Differential Output Min Typ Max
AD8222
Parameter COMMON-MODE REJECTION RATIO (CMRR) CMRR DC to 60 Hz with 1 k Source Imbalance G=1 G = 10 G = 100 G = 1000 NOISE Voltage Noise, 1 kHz Input Voltage Noise, eNI Output Voltage Noise, eNO RTI G=1 G = 10 G = 100 to 1000 Current Noise VOLTAGE OFFSET 1 Input Offset, VOSI Overtemperature Average TC Output Offset, VOSO Overtemperature Average TC Offset RTI vs. Supply (PSR) G=1 G = 10 G = 100 G = 1000 INPUT CURRENT Input Bias Current Overtemperature Average TC Input Offset Current Overtemperature Average TC REFERENCE INPUT RIN IIN Voltage Range Gain to Output POWER SUPPLY Operating Range Quiescent Current (per Amplifier) Overtemperature
Conditions
Unit
VCM = -10 V to +10 V 80 100 120 130 RTI Noise = eNI2 + (eNO/G)2 VIN+, VIN-, VREF = 0 V f = 0.1 Hz to 10 Hz 2 0.5 0.25 40 6 70 135 0.9 600 1 9 90 110 124 130 100 120 130 140 0.5 T = -40C to +85C 3 0.3 T = -40C to +85C 3 20 50 -VS 1 0.0001 VS = 2.3 V to 18 V T = -40C to +85C 2.3 0.75 1
Rev. PrA | Page 3 of 12
80 100 120 130
dB dB dB dB
8 75 2 0.5 0.25 40 6
8 75
nV/Hz nV/Hz V p-p V p-p V p-p fA/Hz pA p-p
f = 1 kHz f = 0.1 Hz to 10 Hz VS = 5 V to 15 V T = -40C to +85C VS = 5 V to 15 V T = -40C to +85C VS = 2.3 V to 18 V
70 135 0.9 600 1 9 90 110 124 130 100 120 130 140 0.5 3 0.3 3 2 3 1 1.5
V V V/C V mV V/C dB dB dB dB nA nA pA/C nA nA pA/C k A V pA/C
2 3 1 1.5
60 +VS
18 0.9 1.2
2.3 1.5 2
18 1.8 2.4
V mA mA
AD8222
Parameter DYNAMIC RESPONSE Small Signal -3 dB Bandwidth G=1 G = 10 G = 100 G =1000 Settling Time 0.01% G = 1 to 100 G = 1000 Settling Time 0.001% G = 1 to 100 G = 1000 Slew Rate GAIN Gain Range Gain Error G=1 G = 10 G = 100 G = 1000 Gain Nonlinearity G=1 G = 100 G = 1000 G = 1 to 100 Gain vs. Temperature G=1 G > 12 INPUT Input Impedance Differential Common Mode Input Operating Voltage Range 3 Overtemperature Input Operating Voltage Range Overtemperature OUTPUT Output Swing Overtemperature Output Swing Overtemperature Short-Circuit Current TEMPERATURE RANGE Specified Performance
1 2 3
Preliminary Technical Data
Conditions Single-Ended Output (Both Amplifiers) Min Typ Max Differential Output Min Typ Max Unit
825 562 100 14.7 10 V step 10 80 10 V step 13 110 2 2.5 1000 0.1 0.3 0.3 0.3 VOUT = -10 V to +10 V RL = 10 k RL = 10 k RL = 10 k RL = 2 k 3 5 10 10 3 10 15 40 95 10 -50
825 562 100 14.7
kHz kHz kHz kHz s s s s V/s V/s 1000 0.1 0.3 0.3 0.3 V/V % % % % ppm ppm ppm ppm ppm/C ppm/C
G=1 G = 5 to 1000 G = 1 + (49.4 k/RG) VOUT 10 V
1.5 2 1
1.5 3 1
2 4
3 5 10 10 3
10 15 40 95 10 -50
100||2 100||2 VS = 2.3 V to 5 V T = -40C to +85C VS = 5 V to 18 V T = -40C to +85C RL = 10 k VS = 2.3V to 5V T = -40C to +85C VS = 5V to 18V T = -40C to +85C -VS + 1.9 -VS + 2.0 -VS + 1.9 -VS + 2.0 -VS + 1.1 -VS + 1.4 -VS + 1.2 -VS + 1.6 18 -40 +85 -40 +VS - 1.1 +VS - 1.2 +VS - 1.2 +VS - 1.2 +VS - 1.2 +VS - 1.3 +VS - 1.4 +VS - 1.5 -VS + 1.9 -VS + 2.0 -VS + 1.9 -VS + 2.0 -VS + 1.1 -VS + 1.4 -VS + 1.2 -VS + 1.6
100||2 100||2 +VS - 1.1 +VS - 1.2 +VS - 1.2 +VS -1.2 +VS - 1.2 +VS - 1.3 +VS - 1.4 +VS - 1.5 18 +85
G||pF G||pF V V V V V V V V mA C
Total RTI VOS = (VOSI) + (VOSO/G). Does not include the effects of external resistor RG. One input grounded. G = 1.
Rev. PrA | Page 4 of 12
Preliminary Technical Data ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Supply Voltage Internal Power Dissipation Output Short-Circuit Current Input Voltage (Common Mode) Differential Input Voltage Storage Temperature Range Operational Temperature Range Rating 18 V TBD mW Indefinite VS VS -65C to +150C -40C to +85C
AD8222
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Specification is for device in free air: 16-Lead LFCSP: JA (4-layer JEDEC board) = 48.5C/W.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. PrA | Page 5 of 12
AD8222 PIN CONFIGURATION AND FUNCTION DESCRIPTION
15 OUT1 14 OUT2 13 VEE 16 VCC
Preliminary Technical Data
-IN1 1 RG1 2 RG1 3 +IN1 4
PIN 1 INDICATOR
12 -IN2 11 RG2 10 RG2 9 +IN2
05947-002
AD8222
TOP VIEW
VCC 5
Figure 2. Pin Configuration
Table 3. Pin Function Description
Pin No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Mnemonic -IN1 RG1 RG1 +IN1 VCC REF1 REF2 VEE +IN2 RG2 RG2 -IN2 VEE OUT2 OUT1 VCC Description Negative Input In-Amp 1 Gain Resistor In-Amp 1 Gain Resistor In-Amp 1 Positive Input In-Amp 1 Positive Supply Reference Adjust In-Amp 1 Reference Adjust In-Amp 2 Negative Supply Positive Input In-Amp 2 Gain Resistor In-Amp 2 Gain Resistor In-Amp 2 Negative Input In-Amp 2 Negative Supply Output In-Amp 2 Output In-Amp 1 Positive Supply
Rev. PrA | Page 6 of 12
REF1 6 REF2 7
VEE 8
Preliminary Technical Data THEORY OF OPERATION
I VB I
AD8222
IB COMPENSATION C1
A1
A2
C2
IB COMPENSATION 10k +VS 10k OUTPUT 10k
A3
+VS -VS REF
+VS -IN 400 Q1 R1 24.7k +VS RG -VS -VS -VS -VS R2 +VS 24.7k Q2
+VS 400 +IN
10k
Figure 3. Simplified Schematic
The two instrumentation amplifiers of the AD8222 are based on the classic three op amp topology. Figure 3 shows a simplified schematic of one of the amplifiers. Input Transistor Q1 and Transistor Q2 are biased at a fixed current; therefore, any differential input signal forces the output voltages of A1 and A2 to change accordingly. A signal applied to the input creates a current through RG, R1, and R2 such that the outputs of A1 and A2 deliver the correct voltage. Topologically, Q1, A1, and R1 and Q2, A2, and R2 can be viewed as precision current feedback amplifiers. The amplified differential and common-mode signals are applied to a difference amplifier that rejects the common-mode voltage but amplifies the differential voltage. The difference amplifier employs innovations that result in low output offset voltage as well as low output offset voltage drift. Laser-trimmed resistors allow for a highly accurate in-amp with gain error typically less than 20 ppm and CMRR that exceeds 90 dB (G = 1). Using superbeta input transistors and an IB compensation scheme, the AD8222 offers extremely high input impedance, low IBB, low IB drift, low IOS, low input bias current noise, and extremely low voltage noise of 8 nV/Hz.
B B
Because the input amplifiers employ a current feedback architecture, the gain-bandwidth product of the AD8222 increases with gain, resulting in a system that does not suffer from the expected bandwidth loss of voltage feedback architectures at higher gains. To maintain precision even at low input levels, special attention was given to the design and layout of the AD8222, resulting in an in-amp whose performance satisfies the most demanding applications. A unique pinout enables the AD8222 to meet a CMRR specification of 80 dB at 10 kHz (G = 1) and 110 dB at 1 kHz (G = 1000). The balanced pinout, shown in Figure 4, reduces the parasitics that had, in the past, adversely affected CMRR performance. In addition, the new pinout simplifies board layout because associated traces are grouped together. For example, the gain setting resistor pins are adjacent to the inputs.
OUT1 OUT2 VCC VEE
16
15
14
13
-IN1 RG1 RG1 +IN1
AD8222
1 2 3 4 12 11 10 9
-IN2 RG2 RG2 +IN2
The transfer function of the AD8222 is
G =1+ 49.4 k RG
Figure 4. Pinout Diagram
Rev. PrA | Page 7 of 12
05947-004
REF1
REF2
Users can easily and accurately set the gain per amplifier using a single standard resistor.
5
6
7
8
VCC
VEE
05947-003
-VS
AD8222
GAIN SELECTION
Placing a resistor across the RG terminals sets the gain of the AD8222, which can be calculated by referring to Table 4 or by using the following gain equation.
Preliminary Technical Data
A well-implemented layout helps to maintain its high CMRR over frequency. Input source impedance and capacitance should be closely matched. In addition, source resistance and capacitance should be placed as close to the inputs as possible.
RG =
49.4 k G -1
Calculated Gain 1.990 4.984 9.998 19.93 50.40 100.0 199.4 495.0 991.0
Grounding
The output voltage of the AD8222 is developed with respect to the potential on the reference terminal. Care should be taken to tie REF to the appropriate local ground. In mixed-signal environments, low level analog signals need to be isolated from the noisy digital environment. Many ADCs have separate analog and digital ground pins. Although it is convenient to tie both grounds to a single ground plane, the current traveling through the ground wires and PC board can cause hundreds of millivolts of error. Therefore, separate analog and digital ground returns should be used to minimize the current flow from sensitive points to the system ground.
Table 4. Gains Achieved Using 1% Resistors
1% Standard Table Value of RG () 49.9 k 12.4 k 5.49 k 2.61 k 1.00 k 499 249 100 49.9
REFERENCE TERMINAL
The AD8222 defaults to G = 1 when no gain resistor is used. Gain accuracy is determined by the absolute tolerance of RG. The TC of the external gain resistor increases the gain drift of the instrumentation amplifier. Gain error and gain drift are kept to a minimum when the gain resistor is not used. As shown in Figure 3, the reference terminal, REF, is at one end of a 10 k resistor. The output of the instrumentation amplifier is referenced to the voltage on this REF terminal; this is useful when the output signal needs to be offset to a precise midsupply level. For example, a voltage source can be tied to the REF pin to level-shift the output so that the AD8222 can interface with an ADC. The allowable reference voltage range is a function of the gain, input, and supply voltage. The REF pin should not exceed either +VS or -VS by more than 0.5 V. For best performance, source impedance to the REF terminal should be kept low. Additional impedance at the REF terminal results in amplification of the signal connected to the positive input. The amplification can be computed by
2 (10 k + RREF ) 20 k + RREF
LAYOUT
Careful board layout maximizes system performance. Traces from the gain setting resistor to the RG pins should be kept as short as possible to minimize parasitic inductance. To ensure the most accurate output, the trace from the REF pins should either be connected to its local ground or connected to a voltage that is referenced to its local ground.
Common-Mode Rejection
One benefit of the high CMRR over frequency of the AD8222 is that it has greater immunity to disturbances, such as line noise and its associated harmonics, than do typical in-amps. Typical instrumentation amplifiers have a CMRR that falls off at 200 Hz; common mode filters are often used to compensate for this shortcoming. The AD8222 is able to reject CMRR over a greater frequency range, reducing the need for filtering.
Only the positive signal path is amplified; the negative path is unaffected. This uneven amplification degrades the amplifier's CMRR.
Rev. PrA | Page 8 of 12
Preliminary Technical Data
POWER SUPPLY REGULATION AND BYPASSING
A stable dc voltage should be used to power the instrumentation amplifier. Noise on the supply pins can adversely affect performance. Bypass capacitors should be used to decouple the amplifier. A 0.1 F capacitor should be placed close to each supply pin. As shown in Figure 5, a 10 F tantalum capacitor can be used further away from the part. In most cases, it can be shared by other precision integrated circuits.
+VS
AD8222
INCORRECT
+VS
CORRECT
+VS
AD8 AD82 AD8222
REF
AD8222
REF
-VS TRANSFORMER +VS
-VS TRANSFORMER +VS
0.1F +IN
10F
AD8 AD82 AD8222 D82
REF
AD8222
REF
AD8222
-IN REF
VOUT LOAD
-VS THERMOCOUPLE +VS -VS THERMOCOUPLE +VS C
0.1F -VS
10F
05947-005
C
Figure 5. Supply Decoupling--REF and Output Referred to Local Ground
AD8 AD8222 D82 8
C REF
fHIGH-PASS = 2 1 RC
C
R
AD8222
REF
INPUT BIAS CURRENT RETURN PATH
The input bias current of the AD8222 must have a return path to common. When the source, such as a thermocouple, cannot provide a return current path, one should be created, as shown in Figure 6.
-VS CAPACITIVELY COUPLED
R
05947-006
-VS CAPACITIVELY COUPLED
Figure 6. Creating an IBIAS Path
INPUT PROTECTION
All terminals of the AD8221 are protected against ESD (1 kV-- human body model). In addition, the input structure allows for dc overload conditions below the negative supply, -VS. The internal 400 resistors limit current in the event of a negative fault condition. However, in the case of a dc overload voltage above the positive supply, +VS, a large current would flow directly through the ESD diode to the positive rail. Therefore, an external resistor should be used in series with the input to limit current for voltages above +VS. In either scenario, the AD8221 can safely handle a continuous 6 mA current, I = VIN/REXT for positive overvoltage and I = VIN/(400 + REXT) for negative overvoltage. For applications where the AD8221 encounters extreme overload voltages, such as cardiac defibrillators, external series resistors and low leakage diode clamps, such as the BAV199L, the FJH1100s or the SP720, should be used.
Rev. PrA | Page 9 of 12
AD8222
RF INTERFERENCE
RF rectification is often a problem when amplifiers are used in applications where there are strong RF signals. The disturbance can appear as a small dc offset voltage. High frequency signals can be filtered with a low-pass, R-C network placed at the input of the instrumentation amplifier, as shown in Figure 7. The filter limits the input signal bandwidth according to the following relationship.
Preliminary Technical Data
DIFFERENTIAL OUT
A differential circuit configuration is shown in Figure 9. Amplifier 1 sets the differential voltage by maintaining the following equation:
VDIFF_OUT = +OUT - -OUT = (+IN - -IN) x G
Amplifier 2 sets the output common-mode voltage by maintaining the following equation:
VCM_OUT = (+OUT + -OUT)/2 = (REF_A + REF_B)/2
FilterFreqDiff = FilterFreqCM = where CD 10CC.
1 2 R(2CD + CC ) 1 2 RCC
Because the differential voltage is set solely by Amplifier 1, all of the precision specifications (offset voltage, offset drift, and 1/f noise) are the same as if Amplifier 1 was operating in singleended mode.
+15V 0.1F 10F
CC R 4.02k CD R 4.02k CC
1nF +IN 10nF R1 499 -IN 1nF 0.1F -15V 10F
05947-007
AD8222
REF
VOUT
The output common-mode voltage is set by the average of REF_A and REF_B (that is, +IN2 and REF2 of Amplifier 2). Because REF_A and REF_B have different properties, the reference voltage is easy to set for a wide variety of applications REF_A has high impedance but cannot swing to the supply rails of the part, and REF_B must be driven with a low impedance but can go 500 mV beyond the supply rails. A very common application sets the common-mode output voltage to the midscale of a differential ADC. In this case, the ADC reference voltage would be sent to the REF_A terminal, and ground would be connected to the REF_B terminal. This would produce a common-mode output voltage of half the ADC reference voltage.
+IN +IN1
Figure 7. RFI Suppression
+
OUT2
AD8222
REF2 REF_B -OUT
PRECISION STRAIN GAGE
The low offset and high CMRR over frequency of the AD8222 make it an excellent candidate for both ac and dc bridge measurements. As shown in Figure 8, the bridge can be directly connected to the inputs of the amplifier.
5V 10F 350 350 +IN 350 350 R -IN + 0.1F
VDIFF_OUT = +OUT - -OUT = G (+IN - -IN) VCM_OUT = (+OUT + -OUT)/2 = (REF_A + REF_B)/2
Figure 9. Differential Circuit
AD8222
-
05947-008
2.5V
Figure 8. Precision Strain Gage
Rev. PrA | Page 10 of 12
05947-009
+
(2)
-
CD affects the difference signal and CC affects the commonmode signal. Values of R and CC should be chosen to minimize RFI. Mismatch between the R x CC at the positive input and the R x CC at negative input degrades CMRR of the AD8222. By using a value of CD one magnitude larger than CC, the effect of the mismatch is reduced, and therefore, performance is improved.
AD8222
-IN -IN1
OUT1
-
(1)
REF1 -IN2
+OUT
+IN2
REF_A
Preliminary Technical Data OUTLINE DIMENSIONS
4.00 BSC SQ 0.60 MAX 0.60 MAX 0.65 BSC 3.75 BSC SQ 0.50 0.40 0.30
13 12 16 1
AD8222
PIN 1 INDICATOR 2.35 2.20 SQ 2.05 0.25 MIN 1.95 BSC
PIN 1 INDICATOR
TOP VIEW
(BOTTOM VIEW)
EXPOSED PAD
4 5
9
8
12 MAX 1.00 0.85 0.80
0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM
COMPLIANT TO JEDEC STANDARDS MO-220-VGGC
Figure 10. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm x 4 mm Body, Very Thin Quad (CP-16-9) Dimensions are shown in millimeters
ORDERING GUIDE
Model AD8222ACPZ-R7 1 AD8222ACPZ-RL1 AD8222ACPZ-WP1 AD8222-EVAL
1
Temperature Range -40C to +85C -40C to +85C -40C to +85C
Product Description 16-Lead LFCSP_VQ 16-Lead LFCSP_VQ 16-Lead LFCSP_VQ Evaluation Board
Z = Pb-free part.
Rev. PrA | Page 11 of 12
010606-0
SEATING PLANE
0.35 0.30 0.25
0.20 REF
COPLANARITY 0.08
Package Option CP-16-9 CP-16-9 CP-16-9
AD8222 NOTES
Preliminary Technical Data
(c)2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR05947-0-3/06(PrA)
Rev. PrA | Page 12 of 12

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